About: http://webisa.webdatacommons.org/185935545

Property	Value
http://www.w3.org/1999/02/22-rdf-syntax-ns#type	http://www.w3.org/ns/prov#Entity
http://www.w3.org/ns/prov#value	Test bench refers to code that is ancillary to the DUT but operates in conjunction with the DUT. The test bench manages all inputs and outputs of the DUT, including clock signals, and can be written in VERILOG.
http://www.w3.org/ns/prov#wasQuotedFrom	google.com