| http://www.w3.org/ns/prov#value | - FIG. 4B is a plan view of the portion of the wafer level assembly 400 at a stage in the process generally similar to that shown in FIG. 2K. For example, FIG. 4B illustrates a stage in the process of fabrication in which the metal substrate 238 is formed over the seed material 234 on the first side 401a of the wafer level assembly 400 and patterned to form the plurality of dielectric paths 236.
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