| http://www.w3.org/ns/prov#value | - The apparatus of claim 20, further comprising a first channel register and a second channel register, wherein the memory descriptor includes PCI/X transfer data; wherein the pre-processor is operative to write a portion of a first descriptor to the first channel register, said portion including a tag and PCI/X transfer data, and to write a portion of a second descriptor to the first channel regist
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