| http://www.w3.org/ns/prov#value | - FIGS. 29A to 29C are views for illustrating a memory cell according to a ninth embodiment of the invention, wherein FIG. 29A shows a circuit configuration of the memory cell, FIG. 29B shows voltages applied to a word wire and a data wire of the memory cell upon read and write operations, respectively, and FIG. 29C is a view for graphically illustrating dependency of a drain current on a gate-sourc
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