{ "items" : [
    { "id" : "http://webisa.webdatacommons.org/410504048"
      "properties" : {
        "http://www.w3.org/1999/02/22-rdf-syntax-ns#type" : [ "http://www.w3.org/ns/prov#Entity" ] ,
        "http://www.w3.org/ns/prov#value" : [ "If at any time there is a no compare condition, a positive output will appear from inverter circuit 212, which will cause an output from OR circuit 218, thus gating the bits contained in the compare register 208 into the 10bit word position of the vertical compression register 204." ] ,
        "http://www.w3.org/ns/prov#wasQuotedFrom" : [ "google.com" ] } },

    { "id" : "http://webisa.webdatacommons.org/prov/290686772"
      "properties" : {
        "http://www.w3.org/ns/prov#wasDerivedFrom" : [ "http://webisa.webdatacommons.org/410504048"] } } }
