{ "items" : [
    { "id" : "http://webisa.webdatacommons.org/prov/137300572"
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        "http://www.w3.org/ns/prov#value" : [ "OBJECTS AND SUMMARY OF THE INVENTION [0003] Accordingly, an object of the present invention is a method for eliminating false failures saved by redundant paths during circuit area analysis on an integrated circuit layout. [0004] This and additional objects are accomplished by the various aspects of the present invention, wherein briefly stated, one aspect is a method for eliminating false failures" ] ,
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