{ "items" : [
    { "id" : "http://webisa.webdatacommons.org/60967888"
      "properties" : {
        "http://www.w3.org/1999/02/22-rdf-syntax-ns#type" : [ "http://www.w3.org/ns/prov#Entity" ] ,
        "http://www.w3.org/ns/prov#value" : [ "Accordingly, in this case, there is a problem in that the card write/read apparatus having the data bus with the bit width of eight bits must be redesigned extensively to incorporate the decoder circuit by taking into account a signal delay which occurs within the decoder circuit." ] ,
        "http://www.w3.org/ns/prov#wasQuotedFrom" : [ "google.com" ] } },

    { "id" : "http://webisa.webdatacommons.org/prov/8533870"
      "properties" : {
        "http://www.w3.org/ns/prov#wasDerivedFrom" : [ "http://webisa.webdatacommons.org/60967888"] } } }
