<http://webisa.webdatacommons.org/263838484>	<http://www.w3.org/1999/02/22-rdf-syntax-ns#type>	<http://www.w3.org/ns/prov#Entity> .
<http://webisa.webdatacommons.org/263838484>	<http://www.w3.org/ns/prov#value>	"Processor 10 is interconnected via system bus 12 to random access memory (RAM) 16, read only memory (ROM) 14, and input/output (I/O) adapter 18 for connecting peripheral devices such as disk units 20, tape drives 40, and printers" .
<http://webisa.webdatacommons.org/prov/267074136>	<http://www.w3.org/ns/prov#wasDerivedFrom>	<http://webisa.webdatacommons.org/263838484> .
<http://webisa.webdatacommons.org/263838484>	<http://www.w3.org/ns/prov#wasQuotedFrom>	<patents.com> .