FIG. 3a is a cross-section of the memory device 100 along the word-line of the memory array 102, while FIG. 3b is a top view of the memory device 100 with all layers removed except for section 3b and FIG. 3c is a cross-section of the memory device 100 as illustrated in FIG. 3b (i.e., with all layers removed except for section 3b).