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  • Since, in the circuit of FIG. 7, a potential level of the power supply node VPPRW is directly applied to the sources of the PMOS transistors QP11 and QP12 and the n-well region constituting these transistors, in all the blocks irrespective of whether selected or non-selected, the sources and the n-well region of the transistors QP11 and QP12 need to be charged up to the potential level of the powe
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