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  • FIG. 8A through FIG. 8C illustrate output circuits to be used for the clock signals and digital image data signals of the present embodiment, and FIG. 8D illustrates an output circuit to be used for signals other than the clock signals and the digital image data signals. [0056]FIG. 8A shows an example in which a VH line and a VL line are provided in addition to the VCC line and the VSS line.
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