a number of transistors in an array on a substrate, each transistor having a body region between a source region and a drain region, at least one transistor including a gate coupled to a dielectric film disposed above the body region, the dielectric film containing a Zr???Sn???Ti???O layer, the Zr???Sn???Ti???O layer having a surface with a roughness less than a monolayer of the Zr???Sn???Ti???O,