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  • FIG. 5A is an equivalent circuit diagram showing the capacitance of the EEPROM cell of FIG. 1A. In FIG. 5A, CC designates a capacitance between control gate 1 and floating gate 2, CD is a capacitance between drain 5 and floating gate 2, and CS is a capacitance between source (including the substrate) and floating gate 2.
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