| http://www.w3.org/ns/prov#value | - For example, in non-volatile semiconductor memories, such as EEPROMs and the like, that have dual-gate (floating gate/control gate) cells, the capacitive coupling ratio between static capacitance C1 associated with a gate insulating layer between the semiconductor substrate and the floating gate electrode and static capacitance C2 associated with an insulating layer between the floating gate elect
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