| http://www.w3.org/ns/prov#value | - For example, as shown in FIG. 25A, vias 172 are etched into die substrate 140 and through a portion of die device region 171, for example the semiconductive portion of a device region comprised of a layer of semiconductor transistors and a multilevel interconnect structure comprised of conducting material (not shown), for example metal, and insulating material, for example silicon oxide or other s
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