| http://www.w3.org/ns/prov#value | - said first recessed regions; a plurality of rails laying between said dielectric layers; a plurality of pads each of said pads being coupled to at least one of said rails; and a plurality of pins disposed through each of said first recessed regions and said second recessed regions from said array region, each of said pins including a pin head overlying said array region and a pin end connected to
|
