| http://www.w3.org/ns/prov#value | - FIG. 9A shows a cut-away perspective view of a portion of a heterogeneous T-Fin FET device 80 with three vertical fins 84F, 84G, and 84H composed of an insulating material such as silicon oxide and silicon nitride arranged in parallel between the source/drain islands 52/54 on the insulator or BOX substrate 81 with the gate electrode 89 (shown in FIG. 9B) and the three corresponding planar fins 85F
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