| http://www.w3.org/ns/prov#value | - said rows where the loops of adjacent shift registers form columns of loops, and the loops of any one shift register form a row of said loops, switch means on said chip and between adjacent loops in each row of loops for cross-linking said adjacent loops to interchange data between cross-linked loops, said switch means including means to cross-link loops in two columns of loops in said storage, a
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