| http://www.w3.org/ns/prov#value | - a memory array having a number of access transistors, at least one access transistor including a gate coupled to a dielectric film, the dielectric film disposed on a body region between a first source/drain region and a second source/drain region on a semiconductor substrate, the dielectric film including a nanolaminate, the nanolaminate having an initial layer, the nanolaminate including:
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