| http://www.w3.org/ns/prov#value | - sing steps, including a semiconductor process-compatible patterned nanofabric layer; configurations other than those illustrated in the micrographs are contemplated by the inventors.) FIGS. 8A-D illustrate a structure fabricated on a silicon substrate used as a bottom(back) gate, with insulator 814 of about 20 nm thickness, and a gap between insulator 814 and the NT channel of approximately 20 nm.
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