| http://www.w3.org/ns/prov#value | - A truncated-pipelined multiplication circuit for multiplying a first number F by a second number S wherein M being the maximum number of bits of said first number and M being a positive integer, thus a bit-sequence of said first number is F=b(M)b(M-1)b(M-2) . . . b(2)b(1), comprising:a first number register column including L sequentially t down connected first number registers represented by R1(i
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