| http://www.w3.org/ns/prov#value | - toring a column address byte, a row address byte and a plural bit code designating one of said plurality of said banks; and a programmable control register including means for indicating whether said plural bit bank designating code is to be appended to said column address byte or to said row address byte and whether it is to be appended as the most significant bit or the least significant bit the
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