| http://www.w3.org/ns/prov#value | - transistor including a first terminal coupled to the second terminal of the first PMOS transistor, including a second terminal spaced apart from said first terminal with a channel therebetween, including a gate coupled to the gate of the first PMOS transistor for controlling current in said channel, and including a well coupled to the first bias terminal, the third PMOS transistor including a firs
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