PropertyValue
http://www.w3.org/1999/02/22-rdf-syntax-ns#type
http://www.w3.org/ns/prov#value
  • (DRAM) controller Each bank can be a chip select or RAS to support a DRAM bank Up to 15 wait states programmable per memory bank Glueless interface to DRAM, SIMMS, SRAM, EPROM, Flash EPROM, and other memory devices.
http://www.w3.org/ns/prov#wasQuotedFrom
  • seekchip.com