| http://www.w3.org/ns/prov#value | - A process for fabricating a storage capacitor for a memory cell unit of a dynamic random access memory semiconductor device, comprising the steps of:(a) forming a transistor, including a gate and a drain/source region on a silicon substrate, the gate including a first polysilicon layer covered by an insulating layer; (b) forming a silicon nitride layer directly on and covering the transistor; (c)
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