| http://www.w3.org/ns/prov#value | - The dynamic semiconductor memory device according to claim 4, whereinsaid connecting means is a transistor, and in said test mode and particularly for writing the voltage at said second level into said memory cell, said bit line isolating means applies to a control electrode of said transistor a voltage smaller in absolute value than that in the case of writing the voltage at said first level. 6.
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