| http://www.w3.org/ns/prov#value | - Thus, as illustrated in FIG. 11, the compression logic 15 (FIG. 2) will send [1110, 56], [10,1], [0,0], [0,0], [0,2], [10,0], [0,3], [110,0] to the serializer logic unit 16 for output to the transmission unit 19 at S61.It should be noted that the invention can be used with any imager including CMOS, CCD or any other imager using an array of imaging structures.
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