| http://www.w3.org/ns/prov#value | - For example, gate and junction regions can be covered with silicide, etch stop layers, and/or planarized Interlayer Dielectric (ILD) made of materials including silicon dioxide (SiO2), phosphosilicate glass (PSG, a Phosphorous doped SiO2), silicon nitride (Si3N4), and silicon carbide (SiC).
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