| http://www.w3.org/ns/prov#value | - Following to that, a silicon oxide film 17 of 6000 ??? in thickness is formed as an interlayer insulator by means of plasma CVD. Contact holes are formed therethrough and electrode/wires 18 a and 18 b for the logic circuit and an electrode/wire 18 c for the matrix circuit are formed by using metallic materials such as a multi-layered film of titanium nitride and aluminum.
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