PropertyValue
http://www.w3.org/1999/02/22-rdf-syntax-ns#type
http://www.w3.org/ns/prov#value
  • FIG. 1B is a more detailed block diagram of the transmitting or recording side of the system, and includes a detailed diagram of the dot interlace circuit 14 of FIG. 1A. As seen therein, dot interlace circuit 14 comprises a sync separator 56, phase discriminator 58, automatic frequency control (AFC) circuit 60, master oscillator 62, frequency divider chain 64, and a buffer 66.
http://www.w3.org/ns/prov#wasQuotedFrom
  • google.com.au