| http://www.w3.org/ns/prov#value | - FIG. 12A is a plan view showing one of the main steps of manufacturing a nonvolatile semiconductor memory according to the embodiment of the present invention, FIG. 12B is a sectional view taken along the line 12B-12B in FIG. 12A, FIG. 12C is a sectional view taken along the line 12C-12C in FIG. 12A, FIG. 12D is a sectional view taken along the line 12D-12D in FIG. 12A, and FIG. 12E is a sectional
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