About: http://webisa.webdatacommons.org/260698231

Property	Value
http://www.w3.org/1999/02/22-rdf-syntax-ns#type	http://www.w3.org/ns/prov#Entity
http://www.w3.org/ns/prov#value	Other internal FPGA signals such as power, test and loading configuration signals are not shown, but, as would be apparent to one of ordinary skill in the art, are nevertheless present in the I/O buffer circuit of FIG. 1.
http://www.w3.org/ns/prov#wasQuotedFrom	google.com