| http://www.w3.org/ns/prov#value | - N input circuits, where N is an integer greater than four, each input circuit comprising: an input terminal, a first pass gate coupled to the first input terminal and having a gate terminal, a second pass gate coupled to the first pass gate and having a gate terminal, and an output terminal coupled to the second pass gate; N memory cells susceptible to the single event upsets, each memory cell bei
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