| http://www.w3.org/ns/prov#value | - FIG. 7 is a graph of estimated thermal resistance between a typical semiconductor device junction (i.e., chip 40) and cap structure 46 (i.e., ??JS) versus the thickness of thermal interface layers for three cases: a first case in which only a single thermal interface layer 54 exists between chip 40 and cap structure 46, a second case in which only a single thermal interface layer 59/74 exists betw
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