| http://www.w3.org/ns/prov#value | - Lightly doped source/drain areas are formed adjacent to the gate electrodes, usually by ion implantation of an N-type dopant, such as arsenic (As) or phosphorus (P), and then sidewall spacers are formed, usually by depositing an insulator such as silicon nitride (Si3 N4) or silicon oxide (SiO2) and anisotropically etching back to the substrate surface.
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