| http://www.w3.org/ns/prov#value | - Another aspect of the invention provides a static memory cell comprising a semiconductor substrate; a transistor formed in the substrate, the transistor including a gate, a first n+ region having a depth in the substrate, and a second n+ region having a depth in the substrate greater than the depth of the first n+ region; an n+ buried layer below the second n+ region; and a p+ region above the sec
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