| http://www.w3.org/ns/prov#value | - ic error signal (IGNNE) and a non-maskable interrupt request signal (NMI); at least one socket means, disposed on the circuit board and coupled to said bus, for plugging in different types of CPU chips, wherein at least two of said different types of CPU chips drive said FERR signal on different first and second respective output pins, and wherein at least two of said different types of CPU chips
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