| http://www.w3.org/ns/prov#value | - In the memory device now under consideration, peripheral circuits thereof such as a decoder, the sense amplifier, an output circuit and the like are implemented by using the conventional bulk MOSFET formed in a surface of a Si-substrate in such an arrangement as illustrated in FIG. 8, and a memory cell array including the memory elements MP1 to MP4 each of the structure illustrated in FIG. 1 are f
|
