| http://www.w3.org/ns/prov#value | - nd hole. [0023] A second semiconductor device having a memory cell region in which a memory cell electrically connected to a bit line is arranged, and a non-memory cell region in which a circuit except for the memory cell is arranged, according to the present invention is characterized by that a metal layer is stacked on a diffusion region formed in the semiconductor substrate in the non-memory ce
|
