| http://www.w3.org/ns/prov#value | - Incidentally, signals controlling the driving timings of the A/D converters 202R, 202G, 202B, the frame memories (FIFO) 203R, 203G, 203B are fed to the A/D converters, the frame memories as pulses such as STV, STVR, STVG, STVB. The STV, STVR, STVG, STVB are generated, by a timing/driving signal generating circuitry 206, based on the SYNC signals including vertical synchronizing signals, horizontal
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