| http://www.w3.org/ns/prov#value | - By way of example, the substrate may be silicon or silicon-germanium; the gate dielectric may be thermal oxide or a high-k material such as N2O3 or silicon nitride; the planarizing step may be performed by etching instead of CMP; the conductive material may be polycrystalline silicon, amorphous silicon, SiGe, etc.
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