| http://www.w3.org/ns/prov#value | - FIG. 4 of the accompanying drawings is a diagram used to explain operation of the present invention in which a block input is 8 bits and a memory capacity is 6 bits. (a) in FIG. 4 shows the case such that the level of the smear component is small, while (b) in FIG. 4 shows the case such that the level of the smear component is large.
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