| http://www.w3.org/ns/prov#value | - In another embodiment, the present invention is a method of operating a non-volatile memory cell integratable with other CMOS circuitry, including providing a non-volatile memory cell, including a antifuse element having a programming node and a capacitor coupled to the programming node, and writing to the non-volatile memory cell by applying one or more voltage pulses to the capacitor element.
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