| http://www.w3.org/ns/prov#value | - Preferably, according to a fifth aspect of the present invention, in the first aspect or fourth aspect of the present invention, the layer 2 control unit 24 a is semifixedly realized in its MPU function by an MPU (microprocessor unit) and a nonvolatile memory such as a ROM or EEPROM storing the layer 2 procedure to be executed by the MPU or by a hardware configuration for executing the layer 2 pro
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