| http://www.w3.org/ns/prov#value | - The present invention relates to a memory device and in particular a flash EPROM having a) a matrix of memory cells having a plurality of rows and columns of which at least one row and/or column is redundant, b) decoding means for row and/or column addresses, and c) control logic for writing, reading and erasing of the cells and control of the device components and a method for discriminating a ga
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