| http://www.w3.org/ns/prov#value | - The data encoder of claim 7 wherein said orthogonal function sequence generator comprises:a K-2 bit binary counter having a clock input for receiving a clock signal of a rate of 2K-2 R, where R is a data bit rate, and having K-2 counter outputs; a plurality of AND gates each having a pair of inputs and an output, a first through a K-2 AND gate of said plurality of AND gates each having one input r
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