| http://www.w3.org/ns/prov#value | - The high K dielectric layer, however, also contains an unacceptably thick (about 1 nm) silicon dioxide layer, and semiconductor devices having such insulating layers will not achieve an equivalent oxide thickness of less than 1 nm, as is desired for CMOS scaling. [0006] Accordingly, what is needed in the art is a semiconductor device and method of manufacturing thereof that does not exhibit the li
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