| http://www.w3.org/ns/prov#value | - The present invention generally relates to semiconductor integrated circuits (ICs), and more particularly to semiconductor interconnect structures, including multilevel interconnect structures, in which advanced dual damascene processing enables using a porous low-k dielectric material as an etch stop layer (ESL) for a non-porous (dense) low-k dielectric film, or using a non-porous (dense) low-k d
|
