| http://www.w3.org/ns/prov#value | - (a) a plurality of IIL circuits each having a plurality of IIL gates constructed of a plurality of transistors, said IIL circuits being stacked in the form of multi-layer in such a manner that an injection input terminal of an nth layer in the stacked arrangement is connected to a ground terminal of an (n+1)th layer, wherein n is an integer.
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