| http://www.w3.org/ns/prov#value | - locked loop (PLL) having a first and a second state responsive to a request signal, the PLL is operative to reduce a phase error responsive to a periodic indication of the phase error, an occurrence of the request signal is not synchronized in time with the periodic indication of the phase error, the PLL comprising:a reference divider coupled to receive a reference frequency signal and a synchroni
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